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<div class="textblock"><code>#include &quot;uvm_macros.svh&quot;</code><br />
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Include dependency graph for axi_if.sv:</div>
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Functions</h2></td></tr>
<tr class="memitem:ga8e39e78e0568e58ff602649ce3ee2524"><td class="memTemplParams" colspan="2">template&lt;parameter C_AXI_ID_WIDTH = 6, parameter C_AXI_ADDR_WIDTH = 32, parameter C_AXI_DATA_WIDTH = 32, parameter C_AXI_LEN_WIDTH = 8&gt; </td></tr>
<tr class="memitem:ga8e39e78e0568e58ff602649ce3ee2524"><td class="memTemplItemLeft" align="right" valign="top">interface&#160;</td><td class="memTemplItemRight" valign="bottom"><a class="el" href="group__SVinterface.html#ga8e39e78e0568e58ff602649ce3ee2524">axi_if</a> (input wire clk, input wire reset, inout wire awready, inout wire&lt; <a class="el" href="axi__pkg_8sv.html#a150391b59e1b2851c89272c84ed02077">C_AXI_ID_WIDTH</a>-1:0 &gt; awid, inout wire&lt; <a class="el" href="axi__pkg_8sv.html#ab3a4347d855f294afac6e48ad076f677">C_AXI_ADDR_WIDTH</a>-1:0 &gt; awaddr, inout wire&lt; <a class="el" href="axi__pkg_8sv.html#ab7eed2ef1c0b3f2e73a3ebe25df4b9e6">C_AXI_LEN_WIDTH</a>-1:0 &gt; awlen, inout wire&lt; 2:0 &gt; awsize, inout wire&lt; 1:0 &gt; awburst, inout wire&lt; 0:0 &gt; awlock, inout wire&lt; 3:0 &gt; awcache, inout wire&lt; 2:0 &gt; awprot, inout wire&lt; 3:0 &gt; awqos, inout wire awvalid, inout wire wready, inout wire&lt; <a class="el" href="axi__pkg_8sv.html#a3640be56d79c0ba42bea37784ac9ae6d">C_AXI_DATA_WIDTH</a>-1:0 &gt; wdata, inout wire&lt; <a class="el" href="axi__pkg_8sv.html#a3640be56d79c0ba42bea37784ac9ae6d">C_AXI_DATA_WIDTH</a>/8-1:0 &gt; wstrb, inout wire wlast, inout wire wvalid, inout wire&lt; <a class="el" href="axi__pkg_8sv.html#a150391b59e1b2851c89272c84ed02077">C_AXI_ID_WIDTH</a>-1:0 &gt; bid, inout wire&lt; 1:0 &gt; bresp, inout wire bvalid, inout wire bready, inout wire arready, inout wire&lt; <a class="el" href="axi__pkg_8sv.html#a150391b59e1b2851c89272c84ed02077">C_AXI_ID_WIDTH</a>-1:0 &gt; arid, inout wire&lt; <a class="el" href="axi__pkg_8sv.html#ab3a4347d855f294afac6e48ad076f677">C_AXI_ADDR_WIDTH</a>-1:0 &gt; araddr, inout wire&lt; <a class="el" href="axi__pkg_8sv.html#ab7eed2ef1c0b3f2e73a3ebe25df4b9e6">C_AXI_LEN_WIDTH</a>-1:0 &gt; arlen, inout wire&lt; 2:0 &gt; arsize, inout wire&lt; 1:0 &gt; arburst, inout wire&lt; 0:0 &gt; arlock, inout wire&lt; 3:0 &gt; arcache, inout wire&lt; 2:0 &gt; arprot, inout wire&lt; 3:0 &gt; arqos, inout wire arvalid, inout wire&lt; <a class="el" href="axi__pkg_8sv.html#a150391b59e1b2851c89272c84ed02077">C_AXI_ID_WIDTH</a>-1:0 &gt; rid, inout wire&lt; 1:0 &gt; rresp, inout wire rvalid, inout wire&lt; <a class="el" href="axi__pkg_8sv.html#a3640be56d79c0ba42bea37784ac9ae6d">C_AXI_DATA_WIDTH</a>-1:0 &gt; rdata, inout wire rlast, inout wire rready)</td></tr>
<tr class="memdesc:ga8e39e78e0568e58ff602649ce3ee2524"><td class="mdescLeft">&#160;</td><td class="mdescRight">bindable interface for AXI UVM environment  <a href="group__SVinterface.html#ga8e39e78e0568e58ff602649ce3ee2524">More...</a><br /></td></tr>
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